Zaptrace
About
AI-native, verification-first EDA kernel for prompt-to-fab electronics: ERC/DRC, routing, KiCad/Gerber export, MCP server, SDK, proof packs.
Details
- Author
- oaslananka
- GitHub stars
- 1
- Downloads
- 204
Jump to
- A Python SDK for programmatic electronics design — parse, validate, place, route, export
- A CLI (zaptrace) for quick design iteration from the terminal
- An MCP server (zaptrace-mcp) that exposes 93 agent-facing tools to AI agents
- A REST API for web-based design workflows
- A verification engine — Electrical Rule Checking (ERC) + Design Rule Checking (DRC) baked in
Setting up with Highlight
This MCP is not yet compatible with Highlight’s one-click setup. However, you can still use it with Highlight by following these steps:
- Download and install Highlight from highlightai.com/download
- Navigate to the plugins tab and select "Add Custom Plugin"
-
Configure the plugin with the settings below
Plugin Name
ZaptraceCommand (node, npx, python, etc.)Please refer to the README for specific instructions on how to obtain API keys or other required environment variables.
- Enable "Start Automatically" if you want the plugin to start when Highlight launches
From the repository
The README includes setup instructions such as zaptrace pipeline --intent "ESP32 I2C sensor node".
Claude Desktop / Cursor
Paste into your MCP client config file to install this server.
{
"mcpServers": {
"zaptrace": {
"zaptrace": {
"command": "uv",
"args": [
"sync",
"--all-extras"
]
}
}
}
}
McpServers
{
"zaptrace": {
"command": "uv",
"args": [
"sync",
"--all-extras"
]
}
}
⚡ ZapTrace
AI-native, verification-first EDA kernel for prompt-to-fab electronics.
Prompt-to-Fab, with proofs.<br />
Intent → normalized design → schematic → ERC → placement → routing → DRC → BOM → manufacturing package → auditable proof pack.
<p>
<a href="https://github.com/oaslananka/zaptrace/actions/workflows/quality.yml"></a>
<a href="https://github.com/oaslananka/zaptrace/actions/workflows/security-scan.yml"></a>
<a href="https://github.com/oaslananka/zaptrace/actions/workflows/docs.yml"></a>
<a href="https://github.com/oaslananka/zaptrace/actions/workflows/scorecard.yml"></a>
</p>
<p>
<a href="https://oaslananka.github.io/zaptrace"></a>
<a href="LICENSE"></a>
<a href="https://www.bestpractices.dev/projects/13403"></a>
</p>
<p>
<a href="https://oaslananka.github.io/zaptrace"><strong>Documentation</strong></a> ·
<a href="#quickstart">Quickstart</a> ·
<a href="docs/development/validation-environment.md">Validation Environment</a> ·
<a href="ROADMAP.md">Roadmap</a> ·
<a href="GOVERNANCE.md">Governance</a> ·
<a href="SECURITY.md">Security</a> ·
<a href="docs/SAFETY.md">Safety</a>
</p>
<p>
<a href="https://www.buymeacoffee.com/oaslananka"></a>
</p>
</div>
> [!WARNING]
> Pre-1.0. ZapTrace is a verification-first EDA kernel, not a fabrication guarantee. All generated outputs require human engineering review before fabrication or use. See Safety Disclaimer.
> [!NOTE]
> Proof Pack = evidence layer, not absolute correctness. Proof packs record configured checks, artifacts, assumptions, and pass/fail evidence. A clean proof pack does not mean a board is manufacturer-approved, production-ready, or safe to fabricate without review.
---
What ZapTrace Is
- A Python SDK for programmatic electronics design — parse, validate, place, route, export.
- A CLI (zaptrace) for quick design iteration from the terminal.
- An MCP server (zaptrace-mcp) that exposes 93 agent-facing tools to AI agents.
- A REST API for web-based design workflows.
- A verification engine — Electrical Rule Checking (ERC) + Design Rule Checking (DRC) baked in.
- A manufacturing export pipeline — Gerber RS-274X, Excellon drill, BOM, pick-and-place, KiCad.
- A proof-pack generator — auditable, reproducible artifact bundles for every design.
What ZapTrace Is Not
- ❌ Not a replacement for KiCad, Altium, or Eagle — ZapTrace is a backend engine, not a full PCB editor GUI.
- ❌ Not a SPICE simulator — no analog simulation (yet).
- ❌ Not a replacement for human engineering judgment — all outputs require review before fabrication.
- ❌ Not fabrication-proven — ZapTrace is pre-1.0. Manufacturing outputs are experimental.
- ❌ Not fabrication-ready or production-ready — no claim of fitness for manufacturing is made.
- ❌ Proof Pack is not a correctness guarantee — it is an evidence layer that records what was checked and what passed/failed. Absence of errors does not mean the design is correct or manufacturable.
- ❌ KiCad Oracle (ERC/DRC) is external validation, not absolute correctness — it catches rule violations the rules know about. A passing KiCad Oracle check does not guarantee a working circuit.
- ❌ Fab profiles are not manufacturer approvals — built-in profiles match common manufacturer capabilities, but you must verify against your specific manufacturer's current specifications. Always obtain pre-fabrication approval.
- ❌ GitHub hardware CI cannot catch all hardware errors — CI runs on simulated or limited hardware; physical validation (probe, power-up, functional test) is irreplaceable.
---
Status
| Area | Status |
|------|--------|
| Design parsing | ✅ Implemented |
| Schematic synthesis | ⚠️ Template selection (keyword-matches a pre-built template; not from-scratch synthesis) |
| ERC (Electrical Rule Checking) | ✅ Implemented |
| Component placement | ✅ Implemented |
| Grid-based routing | ✅ Implemented |
| Net-aware smart routing | ✅ Implemented |
| DRC (Design Rule Checking) | ✅ Implemented |
| Net classification (EE knowledge) | ✅ Implemented |
| Copper pour generation | ✅ Implemented |
| Gerber RS-274X export | ✅ Implemented |
| Excellon drill export | ✅ Implemented |
| BOM (CSV + JSON) export | ✅ Implemented |
| Pick-and-place export | ✅ Implemented |
| KiCad schematic export | ✅ Implemented |
| KiCad hierarchical project import | ✅ Implemented |
| EasyEDA Standard import/export (round-trip ≥0.75) | ✅ Implemented (single flat JSON; import-only, no PCB editor) |
| EasyEDA Pro writer (import-only via KiCad) | ✅ Implemented (ZIP+JSONL; distinct from Standard) |
| Altium ASCII schematic import | ✅ Implemented (ASCII export only; OLE binary not supported) |
| SVG schematic rendering | ✅ Implemented |
| Manufacturing ZIP bundle | ✅ Implemented |
| MCP server (93 tools) | ✅ Implemented |
| Power-tree architecture planner + netlist emit | ✅ Implemented |
| REST API server | ✅ Implemented |
| Design diff | ✅ Implemented |
| Full pipeline (autopilot) | ✅ Implemented |
| Proof-pack system | ✅ Implemented — evidence/sign-off foundation; not a correctness guarantee |
| Plugin system | 🚧 Experimental — signed runtime policy documented; production sandboxing still required |
| Review Studio | ✅ Implemented — human-review panels, proof-pack evidence, benchmark readiness |
| SPICE netlist export | ✅ Implemented foundation — DC gate is evidence/skip aware, not full analog sign-off |
| DFM (Design for Manufacturing) | ✅ Implemented foundation — fab profiles, manufacturing evidence, current/thermal/SI risk reports |
| Multi-board design | 🔮 Planned — post-0.3.0 |
| RF/microwave awareness | 🔮 Planned |
---
v0.3.0 Release Scope
ZapTrace 0.3.0 is an evidence-hardening release. It adds bounded autonomous sign-off vocabulary, requirements coverage, assumption evidence, KiCad oracle evidence, manufacturing/DFM evidence, component/datasheet/footprint provenance, layout/power/SI/PI risk reports, known-failure benchmark mutation coverage, and Review Studio benchmark readiness panels.
This release still makes no fabrication-readiness claim. A pass means the configured evidence gates did not block; it does not mean the design is manufacturer-approved, production-ready, or safe to fabricate without human engineering review.
---
Quickstart
ZapTrace is pre-1.0 and not yet published to PyPI — install from source:
```bash
git clone https://github.com/oaslananka/zaptrace.git
cd zaptrace
uv sync --all-extras
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